Montage Technology Starts Trial Production of First CXL 3.2 Memory Expander Chip

Chinese chipmaker Montage Technology has started trial production of what it calls the industry's first CXL 3.2 Memory eXpander Controller (MXC) chip, aiming to flexibly boost memory capacity in AI servers. The new controller supports DDR5 memory at 8000 MT/s and lets servers tap external memory pools, promising greater scalability for AI and data center systems. As AI models grow and cloud data volumes surge, memory capacity has become a key bottleneck; traditional architectures often require extra servers to expand memory, raising costs and limiting efficiency.

Montage's MXC acts as a smart bridge between the CPU and external DDR5 memory, enabling servers to draw from larger memory pools rather than relying solely on directly attached modules. Built on the latest CXL 3.2 standard, it supports advanced features like memory pooling and tiered memory. The chip, which manages data flow by converting memory requests into DDR5 commands with low latency, also supports CXL Type 3, CXL.mem, CXL.io, and PC Ie 6.x, offering up to 64 GT/s transfer speeds.

It integrates dual DDR5 controllers, PC Ie 6.x and DDR5 physical interfaces, a dual RISC-V processor subsystem, and management units. Montage says the MXC has been integrated into next-gen CXL memory products from Samsung and SK hynix, passing initial validation tests, and is designed for compatibility with Intel Xeon and AMD EPYC server platforms. Though still in trial production, the technology could reshape data center memory usage, turning per-system resources into shared pools for more efficient handling of memory-intensive workloads like large language models and scientific simulations.